A reactive system-specific compilation chain from synchronous dataflow models to fpga netlist

HIGHLIGHTS

• What: The authors propose compilation chain dedicated to reactive systems ie. controllers providing more predictable synthesis process for critical embedded control applications. The authors focused on the current need to support the design of FPGAs. of FPGAs. With the toolchain , the authors propose to support the design of such FPGA for GNC applications written in dataflow languages such as Simulink or Lustre. The experiment showed comparable circuit timing performance between classical RTL synthesis and the Lustre /Reticle synthesis, at a reduced resource cost, while providing both traceability information and predictability in the resulting circuit components.
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