HIGHLIGHTS
- who: Inverter, Topology and S., Sivamani from the Department of Electrical and Electronics Engineering, EGPillay Engineering College, Nagapattinam, Tamilnadu, India have published the research: A Three-Phase Reduced Switch Count Multilevel Inverter Topology, in the Journal: International Transactions on Electrical Energy Systems of 19/09/2022
- what: A new MLI topology has been developed for high power medium voltage applications with a view to reduce total power components for higher voltage levels.
- how: At every clock cycle the sine and carrier data are compared to get base PWM for each level.
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