Analysis of the impact of electrical and timing masking on soft error rate estimation in vlsi circuits

HIGHLIGHTS

  • who: Tsoumanis et al. from the Department of Electrical and Computer Engineering, University of Thessaly, Volos, Greece have published the research: Analysis of the Impact of Electrical and Timing Masking on Soft Error Rate Estimation in VLSI Circuits, in the Journal: Technologies 2022, 10, 23. of /2022/
  • what: As regards the timing-masking, the STA analysis that the authors implement ensures that the delay of the SET is calculated accurately as it propagates until FFs. In the context of this work, a comprehensive modeling of electrical masking that contributes to the SER evaluation accuracy is . . .

     

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