Automated design error debugging of digital vlsi circuits

HIGHLIGHTS

• who: Mohammed Moness from the Computers and Systems EngDept, Minia University, Minia, Egypt have published the paper: Automated Design Error Debugging of Digital VLSI Circuits, in the Journal: (JOURNAL)
• what: The authors propose a new approach utilizing deep learning for fault detection (FD) of combinational and sequential circuits in a type of stuck-at-faults. The aim of the proposed semisupervised FD model is to avoid the search space explosion problem by taking advantage of unsupervised and supervised learning processes. Exact debuggers using Max-SAT approach for detecting the main reason of faults existed in . . .
  

   

  

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