HIGHLIGHTS
- who: Laplace and collaborators from the Computer, Electrical and Mathematical Sciences and Engineering Division, King Abdullah University of Science have published the paper: Efficient Acceleration of Stencil Applications through, in the Journal: (JOURNAL)
- what: This study proposes a 2D stencil kernel architecture based on associative in-memory processing to eliminate the memory bottleneck. The study shows the two implementations by using both SRAMs and memristors. This study shows the two implementation candidates for APs, which are SRAM-based and ReRAM-based. Although the study focuses on stencil applications, it can be generalized to other signal . . .
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