Experimental demonstration of an on-chip p-bit core based on stochastic magnetic tunnel junctions and 2d mos2 transistors

HIGHLIGHTS

• What: In this work, by combining stochastic MTJs with 2D-MoS2 field-effect transistors (FETs), the authors demonstrate an on-chip realization of a p-bit building block displaying voltage-controllable stochasticity. While this approach has not reached the level of maturity required to compete with CMOS-compatible MTJ technology, the design rules presented in this work are valuable for future experimental implementations of scaled on-chip p-bit networks with reduced footprint.
• Who: John Daniel from the (UNIVERSITY) have published the Article: Experimental demonstration of an on-chip p-bit core based on stochastic . . .
  

   

  

  If you want to have access to all the content you need to log in!

  Thanks :)

  Username or E-mail:

  If you don't have an account, you can create one here.