Power aware physical model for 3d ic’s

HIGHLIGHTS

  • who: sys14 from the Integral University, Lucknow, India have published the research: POWER AWARE PHYSICAL MODEL FOR 3D ICu2019S, in the Journal: (JOURNAL)
  • what: The authors have proposed a geometric model that is employed to devise a scheme for identifying the hotspots and zones in a chip. Power management techniques aid in obtaining a uniform power profile throughout the chip but the authors propose an algorithm using minimum bipartite matching where the authors try to move the sources minimally (with minimum perturbation in the chip floor plan) near cooler points (blocks) to obtain a uniform . . .

     

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