Vertical gate-all-around device architecture to improve the device performance for sub-5-nm technology

HIGHLIGHTS

• who: Changwoo Noh et al. from the Department of Semiconductor and Display Engineering, Sungkyunkwan University, Suwon, Korea have published the article: Vertical Gate-All-Around Device Architecture to Improve the Device Performance for Sub-5-nm Technology, in the Journal: Micromachines 2022, 13, x FOR PEER REVIEW of /2022/
• what: The authors propose a device architecture (GAA-FinFET) with the aim of simultaneously improving device performance as well as addressing the short channel effect (SCE).

SUMMARY

Due to the different channel direction in NSFET (compared to FinFET), a modification in fabrication . . .

 



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